Şengül, Metin2023-10-192023-10-19201501303-0914https://search.trdizin.gov.tr/yayin/detay/228516https://hdl.handle.net/20.500.12469/4638In this paper, an algorithm has been proposed to design lumped element delay equalizers which is considered as a single block as opposed to the existing methods in literature. Then after obtaining the desired delay performance, the designed delay equalizer is divided and realized as cascaded first-order and/or secondorder all-pass circuits. An example is given to illustrate the utilization of the proposed algorithmeninfo:eu-repo/semantics/openAccessMühendislikElektrik ve ElektronikArticle18831885115N/AN/A228516228516