Browsing by Author "Bozkuş, Zeki"

Now showing 1 - 20 of 30

Citation Count: 1
Accelerating Brain Simulations on Graphical Processing Units
(IEEE, 2015) Kayraklıoğlu, Engin; El-Ghazawi, Tarek A.; Bozkuş, Zeki
NEural Simulation Tool(NEST) is a large scale spiking neuronal network simulator of the brain. In this work we present a CUDA(R) implementation of NEST. We were able to gain a speedup of factor 20 for the computational parts of NEST execution using a different data structure than NEST's default. Our partial implementation shows the potential gains and limitations of such possible port. We discuss possible novel approaches to be able to adapt generic spiking neural network simulators such as NEST to run on commodity or high-end GPGPUs.
Citation Count: 1
Analytical Expense Management System
(IEEE, 2009) Bozkuş, Zeki; Bisson, Christophe; Arsan, Taner
Although the development of communication technologies (e.g: UMTS ADSL) allowed the elaboration of multiple users' web applications (e.g. information storage) there are still many improvements on many applications to be done and uncovered areas. Expense management systems on web application area are still in their infancy. Expense management software is widely spread in companies and most of time supported by their intranet. These solutions are quite simple as they mainly collect the information related to the expenses and may propose a simple aggregation of these figures. The result is close to what an excel sheet provides.
Citation Count: 7
Big Data Platform Development With a Domain Specific Language for Telecom Industries
(IEEE, 2013) Şenbalcı, Cüneyt; Altuntaş, Serkan; Bozkuş, Zeki; Arsan, Taner
This paper introduces a system that offer a special big data analysis platform with Domain Specific Language for telecom industries. This platform has three main parts that suggests a new kind of domain specific system for processing and visualization of large data files for telecom organizations. These parts are Domain Specific Language (DSL) Parallel Processing/Analyzing Platform for Big Data and an Integrated Result Viewer. hi addition to these main parts Distributed File Descriptor (DFD) is designed for passing information between these modules and organizing communication. To find out benefits of this domain specific solution standard framework of big data concept is examined carefully. Big data concept has special infrastructure and tools to perform for data storing processing analyzing operations. This infrastructure can be grouped as four different parts these are infrastructure programming models high performance schema free databases and processing-analyzing. Although there are lots of advantages of Big Data concept it is still very difficult to manage these systems for many enterprises. Therefore this study suggest a new higher level language called as DSL which helps enterprises to process big data without writing any complex low level traditional parallel processing codes a new kind of result viewer and this paper also presents a Big Data solution system that is called Petaminer.
Citation Count: 10
Big Data Platform Development With a Domain Specific Language for Telecom Industries
(IEEE Computer Society, 2013) Senbalci,C.; Altuntas,S.; Bozkus,Z.; Arsan,T.
This paper introduces a system that offer a special big data analysis platform with Domain Specific Language for telecom industries. This platform has three main parts that suggests a new kind of domain specific system for processing and visualization of large data files for telecom organizations. These parts are Domain Specific Language (DSL), Parallel Processing/Analyzing Platform for Big Data and an Integrated Result Viewer. In addition to these main parts, Distributed File Descriptor (DFD) is designed for passing information between these modules and organizing communication. To find out benefits of this domain specific solution, standard framework of big data concept is examined carefully. Big data concept has special infrastructure and tools to perform for data storing, processing, analyzing operations. This infrastructure can be grouped as four different parts, these are infrastructure, programming models, high performance schema free databases, and processing-analyzing. Although there are lots of advantages of Big Data concept, it is still very difficult to manage these systems for many enterprises. Therefore, this study suggest a new higher level language, called as DSL which helps enterprises to process big data without writing any complex low level traditional parallel processing codes, a new kind of result viewer and this paper also presents a Big Data solution system that is called Petaminer. © 2013 IEEE.
Big Data Platform Development With a Telecom Dsl
(Kadir Has Üniversitesi, 2013) Senbalci, Cuneyt; Bozkuş, Zeki
The amount of data in our world has shown exponential growth in recent years. This creates a very large collection of data sets –so called big data- in many organizations. Enterprises want to process their own big data to generate values from data to improve productivity innovation and customer relationship better than their competitors. However big data is so large and complex that it becomes difficult to process using traditional database management techniques. in this paper we present a system which can be used to analyses for big data of telecom industries. -- Abstract'tan.
Citation Count: 0
Dağınık Çok Çekirdekli Cpu ve Çoklu Gpu Sistemleri İçin Heterojen Programlama Kütüphanesi
(2015) Bozkuş, Zeki; Erten, Cesim
Son yıllarda, yüksek hesaplama performansına ihtiyaç duyan uygulamaların en çok tercih ettiğibilgisayar mimarisi, çok çekirdekli CPU’lara eklenmiş çoklu GPUlardan oluşan heterojen sistemlerdir.Fakat bu tür sistemlerin programlanması alışagelmiş olduğumuz tek işlemci ve hatta çok işlemciprogramlamasından çok daha karmaşıktır.Bu projede, dağınık heterojen sistemler için, programcının verimliliğini artıran ve taşınabilme özelliğiolan bir paralel yazılım kütüphanesi geliştirilmiştir. Proje sıradan bir kütüphaneden çok, C++ dilininiçinde yer alan küçük, yeni bir programlama dilidir. Öyle ki programcı yazdığı herhangi bir C++ programıiçinde bu küçük dilin çekirdek fonksiyon ve veri tiplerini de kullanıp donanımda yer alan bütün paralelişlem cihazlarından (CPU/GPU) faydalanılarak paralel programları kolaylıkla yazabilmektedir.Her karmaşık yazılımda olduğu gibi Heterogeneous Programming Library (HPL) çeşitli katmanlardanoluşmaktadır. Ilk katmanı tekli CPU-GPU ortamında çalışmaktadır. İkinci katmandaki HPL ortak belleklitek-CPU bağlı, çoklu GPU sistemlerini kullanma katmanıdır. Son olarak da dağınık bellekli çoklu CPU GPU sistemlerini kullanana distHPL katmanıdır. İlk iki katman için dergi yayını yapmış bulunmaktayız.Son adim için ise teknik raporumuzu hazırladık, yayın yapmaya çalışıyoruz. Geliştirdiğimiz HPLkütüphanesi taşınırlık, kolay programlama ve performans metriklerinde başarılı sonuçlar elde edildi.Örneğin OpenCL ile karşılaştırıldığında, HPL ile yazılan uygulamalarda %70-%90 oranlarda yazımkolaylığı gözlemledik. Son aşamada, iki biyoinformatik algoritmasını, geliştirdiğimiz programlamamodeliyle yazarak, yüksek hesaplamalı heterojen platformlarda çalıştırdık.
Citation Count: 2
Developing Adaptive Multi-Device Applications With the Heterogeneous Programming Library
(Springer, 2015) Vinas, Moises; Bozkuş, Zeki; Fraguela, Basilio B.; Andrade, Diego; Doallo, Ramon
The usage of heterogeneous devices presents two main problems. One is their complex programming a problem that grows when multiple devices are used. The second issue is that even if the codes for these devices can be portable on top of OpenCL they lack performance portability effectively requiring specialized implementations for each device to get good performance. In this paper we extend the Heterogeneous Programming Library (HPL) which improves the usability of heterogeneous systems on top of OpenCL to better handle both issues. First we provide HPL with mechanisms to support the implementation of any multi-device application that requires arbitrary patterns of communication between several devices and a host memory. In a second stage HPL is improved with an adaptive scheme to optimize communications between devices depending on the execution environment. An evaluation using benchmarks with very different nature shows that HPL reduces the SLOCs and programming effort of OpenCL applications by 27 and 43 % respectively while improving the performance of applications that exchange data between devices by 28 % on average.
Citation Count: 2
Developing Adaptive Multi-Device Applications With the Heterogeneous Programming Library
(Kluwer Academic Publishers, 2015) Viñas,M.; Bozkus,Z.; Fraguela,B.B.; Andrade,D.; Doallo,R.
The usage of heterogeneous devices presents two main problems. One is their complex programming, a problem that grows when multiple devices are used. The second issue is that even if the codes for these devices can be portable on top of OpenCL, they lack performance portability, effectively requiring specialized implementations for each device to get good performance. In this paper we extend the Heterogeneous Programming Library (HPL), which improves the usability of heterogeneous systems on top of OpenCL, to better handle both issues. First, we provide HPL with mechanisms to support the implementation of any multi-device application that requires arbitrary patterns of communication between several devices and a host memory. In a second stage HPL is improved with an adaptive scheme to optimize communications between devices depending on the execution environment. An evaluation using benchmarks with very different nature shows that HPL reduces the SLOCs and programming effort of OpenCL applications by 27 and 43 %, respectively, while improving the performance of applications that exchange data between devices by 28 % on average. © 2015, Springer Science+Business Media New York.
Development of Hybrid Mpi+upc Parallel Programming Model
(Kadir Has Üniversitesi, 2011) Öztürk, Elif; Bozkuş, Zeki
Parallel Computing is a form of computation that divides a large set of calculations into tasks and runs on multi-core machines simultaneously. Today, Message Passing Interface (MPI) is the most widely used parallel programming paradigm that provides programming both for symmetric multi-processors (SMPs) which consists of shared memory nodes with several multi-core CPUs connected to a high speed network and among nodes simultaneously. Unified Parallel C (UPC) is an alternative language that supports Partitioned Global Address Space (PGAS) that allows shared memory like programming on distributed memory systems.In this thesis, we describe the MPI, UPC and hybrid parallel programming paradigm which is designed to combine MPI and UPC programming models. The aim of the hybrid model is to utilize the advantages of MPI and UPC; these are, MPI?s data locality control and scalability strengths with UPC?s global address space, fine grain parallelism and ease of programming to achieve multiple level parallelism. This thesis presents a detailed description of hybrid model implementation comparing with pure MPI and pure UPC implementations. Experiments showed that the hybrid MPI+UPC model can significantly provide performance increases up to double with pure UPC implementation and up to 20% increases in comparison to pure MPI implementation. Furthermore, an optimization was achieved which improved the hybrid performance an additional 20%.
Citation Count: 27
Exploiting Heterogeneous Parallelism With the Heterogeneous Programming Library
(2013) Viñas,M.; Bozkus,Z.; Fraguela,B.B.
While recognition of the advantages of heterogeneous computing is steadily growing, the issues of programmability and portability hinder its exploitation. The introduction of the OpenCL standard was a major step forward in that it provides code portability, but its interface is even more complex than that of other approaches. In this paper, we present the Heterogeneous Programming Library (HPL), which permits the development of heterogeneous applications addressing both portability and programmability while not sacrificing high performance. This is achieved by means of an embedded language and data types provided by the library with which generic computations to be run in heterogeneous devices can be expressed. A comparison in terms of programmability and performance with OpenCL shows that both approaches offer very similar performance, while outlining the programmability advantages of HPL. © 2013 Elsevier Inc. All rights reserved.
Citation Count: 27
Exploiting Heterogeneous Parallelism With the Heterogeneous Programming Library
(Academic Press Inc Elsevier Science, 2013) Vinas, Moises; Bozkuş, Zeki; Fraguela, Basilio B.
While recognition of the advantages of heterogeneous computing is steadily growing the issues of programmability and portability hinder its exploitation. The introduction of the OpenCL standard was a major step forward in that it provides code portability but its interface is even more complex than that of other approaches. In this paper we present the Heterogeneous Programming Library (HPL) which permits the development of heterogeneous applications addressing both portability and programmability while not sacrificing high performance. This is achieved by means of an embedded language and data types provided by the library with which generic computations to be run in heterogeneous devices can be expressed. A comparison in terms of programmability and performance with OpenCL shows that both approaches offer very similar performance while outlining the programmability advantages of HPL. (C) 2013 Elsevier Inc. All rights reserved.
Citation Count: 8
GPU accelerated molecular docking simulation with genetic algorithms
(Springer Verlag, 2016) Altuntaş,S.; Bozkus,Z.; Fraguela,B.B.
Receptor-Ligand Molecular Docking is a very computationally expensive process used to predict possible drug candidates for many diseases. A faster docking technique would help life scientists to discover better therapeutics with less effort and time. The requirement of long execution times may mean using a less accurate evaluation of drug candidates potentially increasing the number of false-positive solutions, which require expensive chemical and biological procedures to be discarded. Thus the development of fast and accurate enough docking algorithms greatly reduces wasted drug development resources, helping life scientists discover better therapeutics with less effort and time. In this article we present the GPU-based acceleration of our recently developed molecular docking code. We focus on offloading the most computationally intensive part of any docking simulation, which is the genetic algorithm, to accelerators, as it is very well suited to them. We show how the main functions of the genetic algorithm can be mapped to the GPU. The GPU-accelerated system achieves a speedup of around ~ 14x with respect to a single CPU core. This makes it very productive to use GPU for small molecule docking cases. © Springer International Publishing Switzerland 2016.
Citation Count: 5
Gpu Accelerated Molecular Docking Simulation With Genetic Algorithms
(Springer International Publishing Ag, 2016) Altuntaş, Serkan; Bozkuş, Zeki; Fraguela, Basilio B.
Receptor-Ligand Molecular Docking is a very computationally expensive process used to predict possible drug candidates for many diseases. A faster docking technique would help life scientists to discover better therapeutics with less effort and time. The requirement of long execution times may mean using a less accurate evaluation of drug candidates potentially increasing the number of false-positive solutions which require expensive chemical and biological procedures to be discarded. Thus the development of fast and accurate enough docking algorithms greatly reduces wasted drug development resources helping life scientists discover better therapeutics with less effort and time. In this article we present the GPU-based acceleration of our recently developed molecular docking code. We focus on offloading the most computationally intensive part of any docking simulation which is the genetic algorithm to accelerators as it is very well suited to them. We show how the main functions of the genetic algorithm can be mapped to the GPU. The GPU-accelerated system achieves a speedup of around similar to 14x with respect to a single CPU core. This makes it very productive to use GPU for small molecule docking cases.
Hybrid Kmeans Clustering Algorithm
(Kadir Has Üniversitesi, 2013) Çolakoğlu, Mustafa Alp; Bozkuş, Zeki
From the past up to the present size of the data is rapidly increasing day by day. Growing dimensions of this data can be held in databases is seen as a disadvantage. Companies have seen this information in databases as an excellent resource for increasing profitability. According to this source the profiles of the customers can be clustering and new products can be presented for cluster customers. So data mining algorithms are needed for rapidly examine these sources of information and obtaining meaningful information from resources.This project has been implemented K-means clustering algorithm with the hybrid programming method. This project suggested that data grouped with hybrid programming takes less time. Algorithm accelerated with hybrid programming method. Parallel programming used to solve K-means problem with using multi- processor and threads used for running operations at the same time. Hybrid version of K-means clustering algorithm was written using the C programming language. Existing parallel K-means source code used thread structure is added. Message Passing interface library and POSiX threads are used. Hybrid version of K-means algorithm and parallel K-means algorithm are run many times under the same conditions and comparisons were made. These comparisons were transferred to the tables and graphs. -- Abstract'tan.
Citation Count: 1
Hybrid Mpi Plus Upc Parallel Programming Paradigm on an Smp Cluster
(TUBITAK Scientific & Technical Research Council Turkey, 2012) Bozkuş, Zeki
The symmetric multiprocessing (SMP) cluster system which consists of shared memory nodes with several multicore central processing units connected to a high-speed network to form a distributed memory system is the most widely available hardware architecture for the high-performance computing community. Today the Message Passing Interface (MPI) is the most widely used parallel programming paradigm for SMP clusters in which the MPI provides programming both for an SMP node and among nodes simultaneously. However Unified Parallel C (UPC) is an emerging alternative that supports the partitioned global address space model that can be again employed within and across the nodes of a cluster. In this paper we describe a hybrid parallel programming paradigm that was designed to combine MPI and UPC programming models. This paradigm's objective is to mix the MPI's data locality control and scalability strengths with UPC's fine-grain parallelism and ease of programming to achieve multiple-level parallelism at the SMP cluster which itself has multilevel parallel architecture. Utilizing a proposed hybrid model and comparing MPI-only to UPC-only implementations this paper presents a detailed description of Cannon's algorithm benchmark application with performance results of a random-access benchmark and the Barnes-Hut N-Body simulation. Experiments indicate that the hybrid MPI+UPC model can significantly provide performance increases of up to double in comparison with UPC-only implementation and up to 20% increases in comparison to MPI-only implementation. Furthermore an optimization was achieved that improved the hybrid performance by an additional 20%.
Implementation of Information Technology Infrastructure Library (itil) Processes
(Kadir Has Üniversitesi, 2011) Odabaşı, Selma Yilmaz; Bozkuş, Zeki
Several frameworks tools and standards have been included in iT management systems in organizations such as COBiT CMMS. These days iT management is focusing particularly on the de facto standard iTiL for implementing iT service management. The information Technology infrastructure Library (iTiL) is a public framework that describes good practices in iT service management. it has been drawn from both the public and private sectors internationally. iTiL helps organizations to become aware of the business value their iT services provide to internal and external stakeholders. This thesis describes iT Service Management the history and components of iTiL. in addition it contains a case study about analyzing some processes of iTiL for a technology company which has 500 employees all over Turkey headquarter located in istanbul. We implemented six iTiL process steps in this company. We described the implementation details steps and Key Performance indicators (KPi) for each of these processes. in this work incident Management Configuration Management Problem Management Change Management and Service Level Management processes were implemented and the KPis of these processes with other benefits and performance results were reported. -- Abstarct.
Citation Count: 15
Improving OpenCL programmability with the Heterogeneous Programming Library
(Elsevier B.V., 2015) Viñas,M.; Fraguela,B.B.; Bozkus,Z.; Andrade,D.
The use of heterogeneous devices is becoming increasingly widespread. Their main drawback is their low programmability due to the large amount of details that must be handled. Another important problem is the reduced code portability, as most of the tools to program them are vendor or device-specific. The exception to this observation is OpenCL, which largely suffers from the reduced programmability problem mentioned, particularly in the host side. The Heterogeneous Programming Library (HPL) is a recent proposal to improve this situation, as it couples portability with good programmability. While the HPL kernels must be written in a language embedded in C++, users may prefer to use OpenCL kernels for several reasons such as their growing availability or a faster development from existing codes. In this paper we extend HPL to support the execution of native OpenCL kernels and we evaluate the resulting solution in terms of performance and programmability, achieving very good results. © The Authors. Published by Elsevier B.V.
Citation Count: 12
Improving Opencl Programmability With the Heterogeneous Programming Library
(Elsevier Science Bv, 2015) Vinas, Moises; Fraguela, Basilio B.; Bozkuş, Zeki; Andrade, Diego
The use of heterogeneous devices is becoming increasingly widespread. Their main drawback is their low programmability due to the large amount of details that must be handled. Another important problem is the reduced code portability as most of the tools to program them are vendor or device-specific. The exception to this observation is OpenCL which largely suffers from the reduced programmability problem mentioned particularly in the host side. The Heterogeneous Programming Library (HPL) is a recent proposal to improve this situation as it couples portability with good programmability. While the HPL kernels must be written in a language embedded in C++ users may prefer to use OpenCL kernels for several reasons such as their growing availability or a faster development from existing codes. In this paper we extend HPL to support the execution of native OpenCL kernels and we evaluate the resulting solution in terms of performance and programmability achieving very good results.
Citation Count: 0
Optimizing Neuron Brain Simulator With Remote Memory Access on Distributed Memory Systems
(Institute of Electrical and Electronics Engineers Inc., 2016) Shehzad, Danish; Bozkuş, Zeki
The Complex neuronal network models require support from simulation environment for efficient network simulations. To compute the models increasing complexity necessitated the efforts to parallelize the NEURON simulation environment. The computational neuroscientists have extended NEURON by dividing the equations for its subnet among multiple processors for increasing the competence of hardware. For spiking neuronal networks inter-processor spikes exchange consume significant portion of overall simulation time on parallel machines. In NEURON Message Passing Interface (MPI) is used for inter processor spikes exchange MPI-Allgather collective operation is used for spikes exchange generated after each interval across distributed memory systems. However as the number of processors become larger and larger MPI-Allgather method become bottleneck and needs efficient exchange method to reduce the spike exchange time. This work has improved MPI-Allgather method to Remote Memory Access (RMA) based on MPI-3.0 for NEURON simulation environment MPI based on RMA provides significant advantages through increased communication concurrency in consequence enhances efficiency of NEURON and scaling the overall run time for the simulation of large network models.1 © 2015 IEEE.
Citation Count: 0
Optimizing Neuron Simulation Environment Using Remote Memory Access With Recursive Doubling on Distributed Memory Systems
(Hindawi Ltd, 2016) Shehzad, Danish; Bozkuş, Zeki
Increase in complexity of neuronal network models escalated the efforts to make NEURON simulation environment efficient. The computational neuroscientists divided the equations into subnets amongst multiple processors for achieving better hardware performance. On parallel machines for neuronal networks interprocessor spikes exchange consumes large section of overall simulation time. In NEURON for communication between processors Message Passing Interface (MPI) is used. MPI Allgather collective is exercised for spikes exchange after each interval across distributed memory systems. The increase in number of processors though results in achieving concurrency and better performance but it inversely affects MPI Allgather which increases communication time between processors. This necessitates improving communication methodology to decrease the spikes exchange time over distributed memory systems. This work has improved MPI Allgather method using Remote Memory Access (RMA) by moving two-sided communication to one-sided communication and use of recursive doubling mechanism facilitates achieving efficient communication between the processors in precise steps. This approach enhanced communication concurrency and has improved overall runtime making NEURON more efficient for simulation of large neuronal network models.