Abstraction in FPGA implementation of neural networks

Abstract

A model for FPGA implementation of multilayer perceptron neural networks is presented. The model tries to incorporate object oriented design principles in the analysis training and design of components using hardware description languages. The synthesis will be based on the tools supplied by the FPGA vendors. The results indicate that the method can be utilized and it can be further improved to create a general methodology that bridges the gap between hardware and software in embedded system design.