A New Nano-Design of 16-Bit Carry Look-Ahead Adder Based on Quantum Technology

dc.authorid Ahmadpour, Seyed-Sajad/0000-0003-2462-8030
dc.authorscopusid 57202686649
dc.authorscopusid 55897274300
dc.contributor.author Ahmadpour, Seyed-Sajad
dc.contributor.author Jafari Navimipour, Nima
dc.contributor.author Navimipour, Nima Jafari
dc.contributor.other Computer Engineering
dc.date.accessioned 2024-06-23T21:37:21Z
dc.date.available 2024-06-23T21:37:21Z
dc.date.issued 2023
dc.department Kadir Has University en_US
dc.department-temp [Ahmadpour, Seyed-Sajad; Navimipour, Nima Jafari] Kadir Has Univ, Fac Engn & Nat Sci, Dept Comp Engn, Istanbul, Turkiye; [Navimipour, Nima Jafari] Natl Yunlin Univ Sci & Technol, Future Technol Res Ctr, Touliu 64002, Taiwan en_US
dc.description Ahmadpour, Seyed-Sajad/0000-0003-2462-8030 en_US
dc.description.abstract There is a requirement and a desire to develop reliable and energy-efficient circuit designs that adapt to the expanding field of low-power circuit engineering in the VLSI domain based on nanotechnology. The quantum-dot cellular automata (QCA) technology possesses the potential to supplant the conventional, complementary metal-oxide-semiconductor (CMOS) technology in low-power nano-scale applications due to its diminutive cell dimensions, dependable circuitry architecture, and robust structural integrity. On the other hand, the carry look-ahead adder (CLA) is one of the vital circuits in digital processing utilized in diverse digital applications. In addition, for the design of this essential circuit, the occupied area and the delay play the primary role because using a simple formulation can reduce the occupied area, energy consumption, and the number of gates count. In the previous structures, high delay and use of traditional technology (like CMOS) caused an increase in the number of gate counts and occupied areas. Using QCA technology, simple quantum cells, and a low delay, all the previous shortcomings can be resolved to reduce the number of gate counts and low occupied area in the CLA circuit. This paper proposes a new method that helps the propagation characteristics generate suitable signals to reduce the number of gate counts based on adders in QCA technology. Several new blocks are used to design fast binary adders. Finally, an optimal four and 16-bit CLA circuit will be proposed based on the adder circuit. Furthermore, the execution and experimentation of outcomes are carried out utilizing QCADesigner-2.0.3. The simulation-based comparison of values justified the proposed design's accuracy and efficiency. The simulation results demonstrate that the proposed circuit has a low area and quantum cell. en_US
dc.identifier.citationcount 2
dc.identifier.doi 10.1088/1402-4896/ad0814
dc.identifier.issn 0031-8949
dc.identifier.issn 1402-4896
dc.identifier.issue 12 en_US
dc.identifier.scopus 2-s2.0-85177482066
dc.identifier.scopusquality Q2
dc.identifier.uri https://doi.org/10.1088/1402-4896/ad0814
dc.identifier.uri https://hdl.handle.net/20.500.12469/5715
dc.identifier.volume 98 en_US
dc.identifier.wos WOS:001100092900001
dc.identifier.wosquality Q2
dc.language.iso en en_US
dc.publisher Iop Publishing Ltd en_US
dc.relation.publicationcategory Makale - Uluslararası Hakemli Dergi - Kurum Öğretim Elemanı en_US
dc.rights info:eu-repo/semantics/closedAccess en_US
dc.scopus.citedbyCount 12
dc.subject low-power en_US
dc.subject adders en_US
dc.subject nanoscale en_US
dc.subject carry look-ahead adder en_US
dc.title A New Nano-Design of 16-Bit Carry Look-Ahead Adder Based on Quantum Technology en_US
dc.type Article en_US
dc.wos.citedbyCount 11
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