Low-Energy 3:2 Compressor Using Xor-Xnor Gate Combined With 2:1 Multiplexer in Qca Technology

dc.authorscopusid56912219900
dc.authorscopusid56405207500
dc.authorscopusid57202686649
dc.authorscopusid55823161800
dc.contributor.authorKassa, S.
dc.contributor.authorMisra, N.K.
dc.contributor.authorAhmadpour, S.-S.
dc.contributor.authorBhoi, B.K.
dc.date.accessioned2025-01-15T21:38:17Z
dc.date.available2025-01-15T21:38:17Z
dc.date.issued2024
dc.departmentKadir Has Universityen_US
dc.department-tempKassa S., Symbiosis Institute of Technology, Symbiosis International Deemed University, Pune, India; Misra N.K., VIT-AP University, Amaravathi, India; Ahmadpour S.-S., Kadir Has University, Istanbul, Turkey; Bhoi B.K., Veer Surendra Sai University of Technology, Burla, Indiaen_US
dc.description.abstractAbstract: In the field of circuit design, there is a growing trend toward the design of high-speed circuits with a minimum amount of faults on a nanoscale level. In this way, quantum-dot cellular automata (QCA) is a nanoscale-based paradigm that uses a quantum cell with four dots and two electrons to compute logic bits, comparable to transistor-based CMOS architecture. This article focuses on the low-energy compressor design employing an XOR-XNOR gate and a 2:1 multiplexer. Furthermore, a compressor design provides 152 cells employing a coplanar arrangement in QCA with eight majority gates (MG). The compressor energy dissipation is examined using the QCAPro tool, which has various tunneling energy values. Furthermore, the compressor thermal and polarisation layouts are presented. The novel circuit performance is compared with the best existing circuits on QCA regarding cell count, entire area, MG, and latency to assess the newly designed compressor performance. The proposed compressor is tested using the missing cells in the QCADesigner tool. This design has only 5 test vectors, 100% fault coverage, and is best suited for design for testability (DFT). The proposed compressor can be used with various multipliers, including the Wallace tree multiplier, DADDA multiplier, and higher order 7:3 compressor. © Allerton Press, Inc. 2024.en_US
dc.identifier.citation2
dc.identifier.doi10.3103/S0735272724030014
dc.identifier.endpage12en_US
dc.identifier.issn0735-2727
dc.identifier.issue1en_US
dc.identifier.scopus2-s2.0-85212144083
dc.identifier.scopusqualityQ3
dc.identifier.startpage1en_US
dc.identifier.urihttps://doi.org/10.3103/S0735272724030014
dc.identifier.urihttps://hdl.handle.net/20.500.12469/7129
dc.identifier.volume67en_US
dc.identifier.wosqualityN/A
dc.language.isoenen_US
dc.publisherAllerton Press Inc.en_US
dc.relation.ispartofRadioelectronics and Communications Systemsen_US
dc.relation.publicationcategoryMakale - Uluslararası Hakemli Dergi - Kurum Öğretim Elemanıen_US
dc.rightsinfo:eu-repo/semantics/closedAccessen_US
dc.subjectBinary Compressoren_US
dc.subjectDigital Circuitsen_US
dc.subjectLow-Poweren_US
dc.subjectNanocomputingen_US
dc.subjectQcaen_US
dc.titleLow-Energy 3:2 Compressor Using Xor-Xnor Gate Combined With 2:1 Multiplexer in Qca Technologyen_US
dc.typeArticleen_US
dspace.entity.typePublication

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