A New Nano-Design of an Efficient Synchronous Full-Adder/Subtractor Based on Quantum-Dots

Abstract

Quantum-dot cellular automata (QCA), known as one of the alternative technologies of CMOS technology, promises to design digital circuits with extra low-power, extremely dense, and high-speed structures. Moreover, the next generation of digital systems will be used QCA as desired technology. In designing arithmetic circuits, efficient designs such as full-adder and full-subtractor can play a significant role. In addition, they are considering the most used structures in digital operations. Furthermore, full-adder and fullsubtractor are always effective parts of all complex and well-known circuits such as Arithmetic Logic Unit (ALU), Microprocessors, etc. This paper proposes low complexity and high-speed QCA coplanar synchronous full-adder/subtractor structures by applying formulations based on the Exclusive-OR gate to decrease energy consumption. The proposed design is simulated using QCADesigner 2.0.3. The simulation results confirm the efficiency of the proposed circuit. Moreover, comparative investigation indicates the superiority of proposed designs compared to state-of-the-art designs. Finally, the suggested QCA coplanar synchronous fulladder/subtractor shows 5.88% and 7.69% improvement in consumed cells relative to the best full adder and full subtractor, respectively. © 2023 Published by ISRES.